Sega opted for a fully-fledged Zilog Z80 CPU running at ~3.58 MHz, a popular choice among computer manufacturers such as Sinclair, Amstrad, and Tandy.
The American Tandy TRS-80 (1977). I found it in the Computer History Museum (Mountain View, California), during my visit in June 2019.
The British Sinclair ZX80 (1980), it is way smaller than it looks! This is part of Christopher Rivett's collection .
The Z80 CPU has an interesting background, as it was designed by none other than the authors of the Intel 8080 (Federico Faggin and Masatoshi Shima), who became disenchanted with Intel's direction and decided to start their own silicon company, Zilog, in 1974.
The Z80 chip on the Master System's motherboard
Their debut product can be considered an unofficial successor to the Intel 8080, now featuring:
- The Z80 Instruction Set Architecture (ISA): An instruction set compatible with the Intel 8080 but expanded with lots more instructions. It handles 8-bit words.
- An 8-bit data bus, ideal for moving 8-bit data around. Larger values will consume extra CPU cycles.
- Fourteen 8-bit general-purpose registers : This is quite a lot, considering the Intel 8080 features half and the MOS 6502 only three. However, the Z80's register file exhibits some caveats (or advantages, depending on how you see it):
- Only seven registers are accessible at a time, the other seven are called 'Alternative Registers' and must be swapped with the first set to be able to access them. This aligns with the principle of bank switching. Also, the Z80 provides specialised instructions like
EXandEXXto transfer the contents between each set. - Within each set, six 8-bit registers may also be paired together to provide up to three 16-bit registers, allowing the manipulation of larger values.
- Only seven registers are accessible at a time, the other seven are called 'Alternative Registers' and must be swapped with the first set to be able to access them. This aligns with the principle of bank switching. Also, the Z80 provides specialised instructions like
- A 16-bit address bus, its consequences are explained in the next section.
- A 4-bit Arithmetic Logic Unit (ALU): This may be a bit shocking, but it simply means that operations on 8-bit values take twice as many cycles to compute.
The motherboard picture at the start of the article shows an NEC D780C-1 CPU, which is simply SEGA second-sourcing the chip to different manufacturers. Other revisions even included the chip manufactured by Zilog. But for this article, it doesn't matter who fabricated the CPU, as the internal features remain the same.
Relative comparison
Notice how the 6502 CPU (featured in the NES) runs at a mere ~2 MHz, which is about half the speed of the Master System's chip. Combined with the Z80's larger register file, one might assume the Master System would outperform the NES without a doubt.
Conversely, if we dig deeper, we see that the 6502 houses a larger (8-bit) ALU. Thus, arithmetic operations that may only take two cycles in the 6502, will consume four on the Z80. Ultimately, this shows that relative qualities like CPU clock speed or register file size, when analysed in isolation, may be deceiving. Both the Z80 and 6502 excel and struggle at different tasks; it all comes down to the skills of the programmer.
Memory available
As mentioned earlier, the Z80 has a 16-bit address bus, so the CPU can find up to 64 KB worth of memory. Now, in the Master System's memory map, you'll find 8 KB of RAM for general-purpose use , this is mirrored in another 8 KB block. Finally, up to 48 KB of game ROM are mapped as well.
Accessing the rest of the components
As you may have read in the previous paragraph, only the main RAM and some cartridge ROM are found in the address space. So, how does the program access other components? Well, unlike Nintendo's Famicom/NES, not all the hardware in the Master System is mapped to memory locations. Instead, certain peripherals are accessed through the Input/Output (I/O) space.
This is because the Z80 family contains an interesting feature called I/O ports, which enable the CPU to communicate with other hardware without exhausting memory addresses. To achieve this, there is a separate address space for 'I/O devices' called ports, and both share the same data and address bus. The difference, however, is that ports are read from and written to using IN and OUT instructions, respectively, as opposed to the traditional load/store instruction (LD).
When an IN or OUT instruction is executed, the Z80 sets up the address lines to point to the peripheral (which could be, for instance, a keyboard), flags its IORQ pin to indicate that an I/O request has been initiated, and finally flags the RD pin or the WR pin depending on whether it's an IN or OUT instruction, respectively. Consequently, the addressed peripheral must manually monitor the address bus and the I/O pins and perform the required operation. In the case of an IN instruction, the CPU stores the received value in a predefined register.
SMS' Addressing layout.
The way SEGA interconnected the CPU with the rest of the components enables it not only to access values but also to expose or conceal certain components from the memory map.
Interestingly, the Game Boy housed a Z80 'variant' that completely omitted the I/O ports. Thus, it had to fit everything into the memory map.
Backwards compatibility
The architecture of this console is very similar to its predecessor, the Sega SG-1000. This allowed the Master System to gain backwards compatibility with the SG-1000. Although, this only applies to the Japanese variant, as others feature a different cartridge slot.